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          EEPW首頁(yè) > 電源與新能源 > 設(shè)計(jì)應(yīng)用 > 跨阻再次罷工:利用MDACs實(shí)現(xiàn)電流電壓轉(zhuǎn)換

          跨阻再次罷工:利用MDACs實(shí)現(xiàn)電流電壓轉(zhuǎn)換

          作者: 時(shí)間:2012-08-14 來(lái)源:網(wǎng)絡(luò) 收藏

           乘法D/A器()和其后置放大器搭建了數(shù)字到模擬世界的橋梁。產(chǎn)生與輸入數(shù)字編碼成比例的值(如圖1所示)。后置放大器DAC輸出的信號(hào)為值。DAC、放大器和電阻,簡(jiǎn)單的-似乎很容易。然而,這個(gè)電路的穩(wěn)定性存在問(wèn)題。

          本文引用地址:http://www.ex-cimer.com/article/176457.htm

          跨阻再次罷工

            這樣應(yīng)用,MDAC的輸出模式包括可變電流源、電阻和電容(圖1a)。輸出電阻和電容值取決于DAC的輸入編碼。一般來(lái)說(shuō),設(shè)計(jì)MDAC到0刻度會(huì)導(dǎo)致輸出電阻接近無(wú)窮大。設(shè)計(jì)DAC到滿量程或任意值,輸出電阻應(yīng)等于反饋電阻RF值。(參見生產(chǎn)廠商數(shù)據(jù)手冊(cè))。根據(jù)內(nèi)部門極結(jié)點(diǎn)通過(guò)MDAC輸出數(shù)據(jù),DAC的輸出電容CD也隨輸入編碼而變化。在滿量程處,MDAC的輸出電容等于數(shù)據(jù)手冊(cè)中標(biāo)準(zhǔn)值。在零點(diǎn),MDAC的輸出電容等于約等于滿量程值的一半。從穩(wěn)定性考慮,使用滿量程時(shí)RD和CD的輸出值。

            放大器反饋網(wǎng)絡(luò)是二階子網(wǎng)絡(luò)。為保證精度,大多數(shù)有一個(gè)片上反饋電阻。反饋電容CF是分開的。

            最后,運(yùn)算放大器有一系列規(guī)格指標(biāo),但對(duì)MDAC電路的穩(wěn)定性沒(méi)有影響:?jiǎn)挝辉鲆鎺抐U,輸入差分電容CDIF和共模電容CCM。

            在這個(gè)系統(tǒng)中,放大器輸入的總電容等于CIN=CD+CDIF+CCM。在圖1b和圖1c中,閉環(huán)零點(diǎn)等于f1=1/(2π(CIN+CF)(RD||RF))。閉環(huán)極點(diǎn)等于f2=1/(2πCFRF)。

            如果開放與閉環(huán)增益曲線之間的閉合速度等于20dB/decade,就能確保系統(tǒng)穩(wěn)定。為了達(dá)到這樣的效果,選擇一個(gè)單位增益帶寬小于f1或大于f2的放大器。

            如果f1大于放大器帶寬,很容易設(shè)計(jì)出穩(wěn)定電路:

            另一方面,如果f2低于開放與閉環(huán)增益曲線的交叉點(diǎn),則使用:

            這些反饋電容的計(jì)算值作為測(cè)試電路的出發(fā)點(diǎn)。出現(xiàn)電路寄生效應(yīng),器件制造偏差等問(wèn)題,可以嘗試改變反饋電容值。

            穩(wěn)定MDAC的模擬信號(hào)是關(guān)鍵。然而,也要考慮放大器的噪聲、輸入偏置電流、偏置、MDAC分辨率和毛刺能量等因素。

          英文原文:

            Transimpedance strikes again: Current-to-voltage conversion with MDACs

            Current-to-voltage conversion seems easy to implement with a DAC, amplifier, and resistor. But beware of stability issues.

            By Bonnie Baker -- EDN, 7/5/2007

            Multiplying DACs (MDACs) and their postamplifiers bridge the digital and analog worlds. MDACs generate a current proportional to an input digital code (Figure 1). The postamplifier converts the DAC’s current-output signal to a voltage level. A simple current-to-voltage conversion seems easy to implement with a DAC, amplifier, and resistor. However, this circuit presents stability issues.

            For the application, the output model of the MDAC contains a variable current source, resistor, and capacitor (Figure 1a). The value of the output resistance and capacitance depends on the input code to the DAC. In general, programming the MDAC to zero scale causes the output resistance, RD, to be near infinite. When you program the DAC to full-scale or all ones, this resistance is equal to the feedback resistance, RF. (See the manufacturer’s data sheets.) The DAC’s output capacitance, CD, also varies with input code according to the number of internal gate-source junctions across the MDAC output. At full-scale, the MDAC output capacitance equals the data-sheet specification. At zero, the MDAC output capacitance is equal to about half the full-scale value. For stability calculations, use the full-scale output values of RD and CD.

            The second subnetwork is the amplifier-feedback network. To maintain precision, most MDACs have a feedback resistor on-chip. The feedback capacitor, CF, is discrete.

            Finally, op amps have a range of specifications, but only a few affect the MDAC circuit’s stability: unity-gain bandwidth, fU; input differential capacitance, CDIF; and common-mode capacitance, CCM.

            In this system, total capacitance at the amplifier input is equal to CIN=CD+CDIF+CCM. In Figure 1b and Figure 1c, the closed-loop zero is equal to f1=1/(2π(CIN+CF)(RD||RF)). The closed-loop pole is equal to f2=1/(2πCFRF).

            You ensure system stability if the rate of closure between the open- and closed-loop-gain curve equals 20 dB/decade. To do so, select an amplifier with unity-gain bandwidth of less than f1 or greater than f2.

            It is easy to design a stable circuit if f1 is higher than the amplifier’s bandwidth:

            Alternatively, if f2 is lower than the intersection of the open- and the closed-loop-gain curve, use:

            CF≤–CIN+1/(2/π(RF||RD)fU).

            Use these calculated values of feedback capacitance as starting points for your test circuit. Circuit parasitics, device-manufacturing variations, and other factors can encourage you to modify the feedback-capacitor value.

            Stabilizing the MDAC’s analog signal is critical. However, also consider amplifier noise, input bias current, offset voltage, MDAC resolution, and glitch energy.

          基爾霍夫電流相關(guān)文章:基爾霍夫電流定律




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