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/>式中：Vin是輸入的電壓的峰值；R1等于R1α+Rds的總和；α2，α3是二次、三次非線性系數(shù)。因此如果把開(kāi)關(guān)管放置在運(yùn)放的虛地端(即運(yùn)放的輸入端)，則HD2和HD3近似等于0。</p>本文引用地址：<a href="http://www.ex-cimer.com/article/188774.htm">http://www.ex-cimer.com/article/188774.htm</a><p><br />4 版圖與后仿真結(jié)果<br /> 圖5是用SMIC 0．18μm CMOS工藝實(shí)現(xiàn)的VGA版圖，芯片面積為：510μm×160μm，整個(gè)版圖包括VGA核心部分，直流偏移消除模塊，和CMOS源極跟隨緩沖電路，恒定Gm的偏置電路。</p><p><img onload="if(this.width>620)this.width=620;" onclick="window.open(this.src)" style="cursor:pointer" src="http://editerupload.eepw.com.cn/fetch/20131113/188774_4_0.jpg" width="500" border="0" /></p><p> 圖6～圖8給出了VGA在Candence環(huán)境下用Spectre工具模擬得到的后仿真結(jié)果。圖6為輸入階越跳變，得到的輸出瞬態(tài)響應(yīng)曲線。</p><p><img onload="if(this.width>620)this.width=620;" onclick="window.open(this.src)" style="cursor:pointer" style="WIDTH: 249px; HEIGHT: 520px" height="520" src="http://editerupload.eepw.com.cn/fetch/20131113/188774_4_1.jpg" width="249" border="0" /></p><p> 圖7為不同的數(shù)字<a class="contentlabel" href="http://www.ex-cimer.com/news/listbylabel/label/增益"><em>增益</em></a>設(shè)置對(duì)應(yīng)的VGA<a class="contentlabel" href="http://www.ex-cimer.com/news/listbylabel/label/增益"><em>增益</em></a>。圖8是放大器不同<a class="contentlabel" href="http://www.ex-cimer.com/news/listbylabel/label/增益"><em>增益</em></a>的頻域響應(yīng)。其增益從0 dB變化到29．5 dB，其中0．5 dB一檔。</p><p><br />5 結(jié) 語(yǔ)<br /> 本文介紹一種O．18μm CMOS工藝實(shí)現(xiàn)，應(yīng)用于GPS全球定位系統(tǒng)得<a class="contentlabel" href="http://www.ex-cimer.com/news/listbylabel/label/可變?cè)鲆娣糯笃?><em>可變?cè)鲆娣糯笃?/em></a>。文中巧妙地應(yīng)用反饋系統(tǒng)中環(huán)路穩(wěn)定性理論設(shè)計(jì)放大器；在增益步長(zhǎng)的控制上，增益隨bit線性化，并保證增益精度不受工藝角偏差影響。仿真結(jié)果表明，該放大器適合在接收機(jī)模擬前端中使用。<br /></p></span>  <div class="n9lpp3r" id="coverDiv" class="article_reg" style="width:100%;overflow:hidden;display:none;z-index:10;position:absolute;left:0;background:#fff;"> <center> <img src="https://webstorage.eepw.com.cn/images/display/reg.jpg" border="0" usemap="#Map" /> <map name="Map" id="Map"> <area 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