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          ARM的System Mode

          作者: 時間:2016-11-10 來源:網(wǎng)絡(luò) 收藏
          ARM v4以后的版本里,ARM核都有7中工作模式:User, FIQ, IRQ, Supervisor, Abort, Undefined,和System。

          7種processor mode又分為3類:

          本文引用地址:http://www.ex-cimer.com/article/201611/317216.htm

          User mode

          Privileged mode

          system mode

          對于System mode的作用一直有些模糊,今天在arm的網(wǎng)站上找到了一份說明文檔,對這個問題的解析很到位,特記錄如下:

          The ARM Architecture defines a User mode that has 15 generalpurpose registers, a pc, and a CPSR.

          除User Mode外,還有5種privileged modes

          每一種Priviledged mode都有一個SPSRand a number of registers that replace some of the 15 User mode generalpurpose registers.

          當(dāng)exception發(fā)生時:

          the current PC is copied into the link register for the exception mode,

          theCPSR is copied into the SPSR for the exception mode.

          The CPSR isthen altered in an exception-dependent way, and the program counteris set to an exception-defined address to start the

          exception handler.

          BL指令copiesthe return address into r14 before changing the PC,so the subroutine return instruction moves r14 to pc (MOV pc,lr).

          Together these actions imply that ARM modes that handle exceptionsmust ensure that another exception of the same type cannot

          occurif they call subroutines, because the subroutine return addresswill be overwritten with the exception return address.

          (要防止lr被覆蓋)

          (In earlier versions of the ARM architecture, this problemhas been solved by either carefully avoiding subroutine calls inexception

          code, or changing from the privileged mode to User mode.The first solution is often too restrictive, and the second meansthe task

          may not have the privileged access it needs to run correctly.)

          從ARMv4架構(gòu)開始,提供了system mode來解決lr覆蓋問題.

          System mode is a privileged processormode that shares the User mode registers. (與User Mode共用registers)

          Privileged mode taskscan run in this mode, and exceptions no longer overwrite the linkregister.

          注意:

          System modecannot be entered by an exception.

          The exceptionhandlers modify the CPSR to enter System mode. See Reentrant interrupt handlersfor an example.

          就不逐字翻譯了,大體意思如下:

          當(dāng)處理器異常出現(xiàn)時,當(dāng)前程序計數(shù)器(也就是 PC+offset,offset與異常種類相關(guān))會被拷貝的相應(yīng)異常模式的LR,CPSR也會被拷貝到

          相應(yīng)異常模式的SPSR。然后CPSR會被設(shè)置為相應(yīng)的異常模式, PC被設(shè)置到對應(yīng)異常的入口處執(zhí)行其處理函數(shù)。

          (上面這些都是ARM核自動操作的)

          ARM的子程序轉(zhuǎn)移指令BL會在改變PC前將返回地址放到LR中,所以從子程序返回時可以把r14放到PC來操作。如MOV pc, lr。

          所有上面的動作都暗示了如果異常處理函數(shù)會調(diào)用子程序(使用 BL),那么各異常模式都必須保證異常處理函數(shù)執(zhí)行的過程中不能出現(xiàn)

          同樣的異常,因為子函數(shù)的返回地址會被異常的返回地址覆蓋掉。(在早期的ARM版本中,可以通過禁止異常處理函數(shù)調(diào)用子函數(shù)或者切

          換處理模式到User模式來解決這個問題。第一種方式過于嚴(yán)格,而第二種方式可以會由于User模式缺少相應(yīng)的權(quán)限而不能執(zhí)行某些動

          作)。

          為此,ARM v4及之后的版本提供了system mode這樣一種處理器模式來解決這個問題。System mode是一種privileged的模式,而且共用

          User模式的所有寄存器。Privileged模式的程序可以運行在這個模式,而不用擔(dān)心處理器異常會擦除LR。



          關(guān)鍵詞: ARMSystemMod

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