關(guān)于STM32 SPI NSS問題的探討

按照標(biāo)準(zhǔn)的SPI協(xié)議，當(dāng)SPI被配置為主機(jī)模式后，通過SPI對從設(shè)備進(jìn)行操作時，其NSS應(yīng)該自動置低，從而選中（使能）從設(shè)備；一旦不對從設(shè)備進(jìn)行操作，NSS立刻置為高。

但是，我在實際調(diào)試過程中卻發(fā)現(xiàn)：STM32 SPI NSS無法自動實現(xiàn)跳變。 一旦SPI初始化完成并使能SPI，NSS立刻置低，然后保持不變。

這個問題一直無法解決，直到我在ST官方論壇上看到國外有些技術(shù)人員也在討論這個問題，他們得出的結(jié)論是：STM32 SPI NSS無法自動跳變。

RichardE

Posted 24-07-2009 at 16:07

Registered on : 11-05-2005 From UK (United Kingdom) Messages :19 OFF-Line

Ive just hit this NSS problem. What is good: That the discussion is here on the forum to stop me spending hours trying to work out what I have done wrong. Thanks guys! What is not good: That NSS doesnt behave as expected. What I expected to happen: Im expecting to see on my scope what I see in Figure 208 of RM008 Reference Manual, i.e. NSS goes high after the transfer. Why a working NSS would be very helpful: Im using the SPI (with DMA) to clock data into shift registers. If NSS went high after the transfer (as indicated by Figure 208), I could use that edge as the strobe to latch the data across into the shift register outputs. Everything would be done by the peripheral. Fire and forget. As it is with the broken NSS, I have to generate an interrupt and use that to strobe the gpio output (I hate controlling gpio from within interrupt routines). Any update as to when this will be fixed?

ST官方技術(shù)人員也證實：STM32 SPI NSS是不會自動置位和復(fù)位的。按照官方說法，ST已經(jīng)將其列入了改進(jìn)計劃。

對于這個問題，可以采用下面的方法解決：

在SPI初始化時，采用NSS soft模式，然后使能NSS輸出功能。從而將NSS當(dāng)做GPIO使用，通過軟件set和reset來實現(xiàn)NSS的置位和復(fù)位。

具體代碼如下：

/* SPI1 configuration ------------------------------------------------------*/
SPI_InitStructure.SPI_Direction = SPI_Direction_1Line_Tx;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; //
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;//SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(SPI1, &SPI_InitStructure);

/*Enable SPI1.NSS as a GPIO*/
SPI_SSOutputCmd(SPI1, ENABLE);

/*Configure PA.4(NSS)--------------------------------------------*/
GPIO_InitStructure.GPIO_Pin =GPIO_Pin_4;
GPIO_InitStructure.GPIO_Mode=GPIO_Mode_Out_PP;
GPIO_Init(GPIOA, &GPIO_InitStructure);

通過將NSS配置為GPIO，在通過SPI操作從設(shè)備時，就可以通過軟件來選中和釋放從設(shè)備了。雖然比起硬件自動置位要麻煩，但問題畢竟解決了。

進(jìn)一步閱讀長達(dá)900頁的Manual，我發(fā)現(xiàn)，文中對于SPI hard模式的描述并非大多數(shù)人所認(rèn)為的硬件SPI，原文如下：

Slave select (NSS) pin management
There are two NSS modes:
● Software NSS mode: this mode is enabled by setting the SSM bit in the SPI_CR1
register (see Figure 209). In this mode, the external NSS pin is free for other
application uses and the internal NSS signal level is driven by writing to the SSI bit in
the SPI_CR1 register.
● Hardware NSS mode: there are two cases:
– NSS output is enabled: when the STM32F20xxx is operating as a Master and the
NSS output is enabled through the SSOE bit in the SPI_CR2 register, the NSS pin
is driven low and all the NSS pins of devices connected to the Master NSS pin see
a low level and become slaves when they are configured in NSS hardware mode.
When an SPI wants to broadcast a message, it has to pull NSS low to inform all
others that there is now a master for the bus. If it fails to pull NSS low, this means
that there is another master communicating, and a Hard Fault error occurs.
– NSS output is disabled: the multimaster capability is allowed.

當(dāng)SPI配置為hard模式后，通過檢測NSS可以實現(xiàn)的是自身主機(jī)和從機(jī)模式的切換，而不是大多數(shù)人所認(rèn)為的自動NSS。。。也就是說：在一個多SPI系統(tǒng)中，STM32 SPI通過NSS檢測，一旦發(fā)現(xiàn)系統(tǒng)中無NSS低信號，自己就輸出低，從而成為主機(jī)；當(dāng)系統(tǒng)中有NSS低信號時（及已經(jīng)有其它SPI宣布為主機(jī)），自己就配置為從機(jī)。 所謂的hard模式的NSS，實際就是為了實現(xiàn)多機(jī)間通信的。

小結(jié)：

望文生義很可怕，Manual要仔細(xì)研讀。

STM32的SPI NSS不論是配置為soft還是hard都是無法自動置位的，但這卻是大多數(shù)應(yīng)用所需要的。正如ST 論壇上RichardE所說：“Everything would be done by the peripheral. Fire and forget.”

，有趣的說法：Fire and forget！ ~~~~