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          EEPW首頁 > 嵌入式系統(tǒng) > 設計應用 > MSP430F149單片機對SDRAM控制程序設計

          MSP430F149單片機對SDRAM控制程序設計

          作者: 時間:2016-11-24 來源:網(wǎng)絡 收藏
          MSP430的內核結構采用具有高透明格式的精簡指令集(RISC)設計。指令分為硬件實現(xiàn)的內核指令和利用這一硬件結構的具有更高效率的模擬指令,使用起來非常方便。在本控制系統(tǒng)中,單片機完成初始化任務(設置標志位、看門狗的工作方式)后,就進入低功耗睡眠狀態(tài)。中斷將其喚醒,轉而進入相應的子程序?;?strong>MSP430F149單片機的SDRAM控制程序如下。

          #include <msp430x14x.h>

          本文引用地址:http://www.ex-cimer.com/article/201611/320795.htm

          void Init(void);

          void Send(char* Data, unsigned int Length);

          void SendAddress(unsigned int Address);

          void SendData(unsigned int Data);

          unsigned int ReceiveData(void);

          char ReadData[20], Buffer[20];

          unsigned char i=0, j, k, flag=0;

          unsigned int Data;

          unsigned int DisplayData;

          char DisplayString[20];

          void main(void)

          {

          WDTCTL = WDTPW + WDTHOLD; // Stop WDT

          Init(); // UART1 inition

          _EINT(); // enable interrupt

          while(1)

          {

          DisplayData = ReceiveData();

          if (DisplayData == 0)

          {

          k = 0;

          if (DisplayData != 0)

          {

          DisplayString[k] = 0 + DisplayData % 10;

          DisplayData = DisplayData / 10;

          k++;

          }

          Send(DisplayString, k);

          }

          }

          }

          void Init(void)

          {

          UCTL1 &= ~SWRST; // reset swrst and usart1 enable

          UCTL1 = 0x10; // 8-bit character

          UBR01 = 0x03; // 8MHz 38400

          UBR11 = 0x00; // 8MHz 38400

          UMCTL1 = 0x4A; // U1CLK = SMCLK=TX2

          UTCTL1 = 0x10;

          ME2 |= 0x30; // Enable USART1 TXD/RXD

          P3SEL= 0xC0; // enable P3.6,7 USART1 TXD/RXD

          P3DIR= 0x40; // P3.6 output direction

          IE2 |= URXIE1; // Enable USART1 RX interrupt

          }

          interrupt [UART1RX_VECTOR] void UART1RX(void) // read data

          {

          if (flag == 0) // wait for strat char of "0xAA" or "0xDD"

          {

          if (RXBUF1 == 0xAA) // alter flag

          {

          flag = 1;

          }

          else if (RXBUF1 == 0xDD) // alter flag

          {

          flag = 2;

          }

          i = 0;

          }

          else

          {

          ReadData[i] = RXBUF1;

          if (ReadData[i++] == 0xFF) // end char of "0xFF"

          {

          Data = 0;

          for (j=i-1; j!=0; j--)

          {

          Data = Data * 10 + (ReadData[j] - 0);

          }

          if (flag == 1) // send address

          {

          SendAddress(Data);

          }

          else if (flag == 2) // send data

          {

          SendData(Data);

          }

          flag = 0;

          }

          }

          }

          void Send(char* Data, unsigned int Length) // send data

          {

          unsigned int i;

          UCTL1 |= TXWAKE;

          TXBUF1 = 0x01;

          while ((UTCTL1&0x01) == 0);

          UCTL1 &= ~TXWAKE;

          for(i=0; i<=Length; i++)

          {

          TXBUF1 = Data[i];

          while ((UTCTL1&0x01) == 0);

          }

          }

          void SendAddress(unsigned int Address) // send address

          {

          // address buses

          P1DIR |= 0xE0; // P1.5-1.7 address buses

          P2DIR = 0xFF; // P2.0-2.7 address buses

          P3DIR |= 0x1F; // P3.0-3.5 address buses

          P4DIR |= 0x1F; // P4.0-4.5 address buses

          P1OUT |= (Address & 0x07);

          P2OUT |= (Address & 0x7F8) >> 3;

          P3OUT |= (Address & 0x1F800) >> 11;

          P4OUT |= (Address & 0x7E0000) >> 17;

          }

          void SendData(unsigned int Data) // send data

          {

          // data buses

          P4DIR |= 0xC0; // P4.6-4.7 data buses

          P5DIR |= 0x1F; // P5.0-5.5 data buses

          P4OUT |= (Data & 0x03);

          P5OUT |= (Data & 0xFC) >> 2;

          }

          unsigned int ReceiveData(void) // send data

          {

          unsigned int Data;

          // data buses

          P4DIR &= 0x3F; // P4.6-4.7 data buses

          P5DIR &= 0xE0; // P5.0-5.5 data buses

          Data = ((P5IN & 0x1F) << 2) | ((P4IN & 0xC0) >> 6);

          return Data;

          }



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