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	 > 模擬技術(shù) > 設(shè)計(jì)應(yīng)用 > 基于LPC1311設(shè)計(jì)的Cortex-M3 CPU USB接
          
    
          

          

          


	
	
	

          
	
          
		
          
			
          基于LPC1311設(shè)計(jì)的Cortex-M3 CPU USB接
          
						
          
				作者：
				時(shí)間：2012-04-14
				來源：網(wǎng)絡(luò)
				
				
				
				
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			-text-size-adjust: auto; -webkit-text-stroke-width: 0px">
          In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software.

          Selectable boot-up: UART or USB (USB on LPC134x only).

          On LPC134x: USB MSC and HID on-chip drivers.

          Serial interfaces:

          USB 2.0 full-speed device controller with on-chip PHY for device (LPC1342/43 only).

          UART with fractional baud rate generation, modem, internal FIFO, and RS-485/EIA-485 support.

          SSP controller with FIFO and multi-protocol capabilities.

          I2C-bus interface supporting full I2C-bus specification and Fast-mode Plus with a data rate of 1 Mbit/s with multiple address recognition and monitor mode.

          Other peripherals:

          Up to 42 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors.

          
				
          
					
					
		  			
		  			
					
				
          
			
          
                
			
							
          
                
			            
                            
              
            
          
		
		
          
		
          
		
          
		
          
			
			
          
		
          
		
		
          
		
          
			
			
		
          
        
		
          
			
          關(guān)鍵詞：
            			            LPC1311
                        Cortex-M3
                        CPU
                        USB
                        
            
          
            
			
          
		
          	
		

	

          
	
	
          
		
          
			
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