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          EEPW首頁 > 模擬技術(shù) > 設(shè)計應用 > 基于MFRC530設(shè)計的ISO14443A無接觸讀卡技術(shù)

          基于MFRC530設(shè)計的ISO14443A無接觸讀卡技術(shù)

          作者: 時間:2011-04-16 來源:網(wǎng)絡 收藏
          本文介紹了MFRC530主要特性,方框圖, 接收器電路框圖, 定時器模塊框圖,以及與微處理器的連接框圖和典型應用電路圖.NXP公司的MFRC530支持ISO14443A通信方案所有層面的高度集成的13.56MHz無接觸通信的讀卡器IC,它采用杰出的調(diào)制和解調(diào)技術(shù),內(nèi)部的發(fā)送器能驅(qū)動接近100毫米距離的天線,接收器則能有效地實現(xiàn)對來自ISO14443A兼容的轉(zhuǎn)發(fā)器信號進行解調(diào),數(shù)據(jù)速率高達424k波特.

          The MF RC530 supports all layers of the ISO14443A communication scheme.

          The MF RC530 supports contactless communication using MIFARE? Higher Baudrates.

          The internal transmitter part is able to drive an antenna designed for proximity operating distance (up to 100 mm) directly without additional active circuitry.

          The receiver part provides a robust and efficient implementation of a demodulation and decoding circuitry for signals from ISO14443A compatible transponders.

          The digital part handles the complete ISO14443A framing and error detection (Parity CRC). Additionally it supports the fast MIFARE? Classic security algorithm to authenticate MIFARE Classic (e.g. MIFARE? Standard, MIFARE? Light) products.

          A comfortable parallel interface, which can be directly connected to any 8-bit μ-Processor gives high flexibility for the reader/terminal design. Additionally a SPI compatible interface is supported.

          MF RC530主要特性:

          ? Highly integrated analog circuitry to demodulate and decode card response

          ? Buffered output drivers to connect an antenna with minimum number of external components

          ? Proximity operating distance (up to 100 mm)

          ? Supports ISO 14443A

          ? Supports MIFARE? Dual Interface Card ICs and supports MIFARE? Classic protocol

          ? Supports contactless communication with higher baudrates up to 424kbaud

          ? Crypto1 and secure non-volatile internal key memory

          ? Pin-compatible to the MF RC500, MF RC531, SL RC400 and CL RC632

          ? Parallel μ-Processor interface with internal address latch and IRQ line

          ? SPI compatible interface

          ? Flexible interrupt handling

          ? Automatic detection of parallel μ-Processor interface type

          ? Comfortable 64 byte send and receive FIFO-buffer

          ? Hard reset with low power function

          ? Power down mode per software

          ? Programmable timer

          ? Unique serial number

          ? User programmable start-up configuration

          ? Bit- and byte-oriented framing

          ? Independent power supply pins for digital, analog and transmitter part

          ? Internal oscillator buffer to connect 13.56 MHz quartz, optimised for low phase jitter

          ? Clock frequency filtering

          ? 3.3 V to 5 V operation for transmitter (antenna driver) in short range and proximity applications

          ? 3.3 V or 5V operation for the digital part


          圖1.MF RC530方框圖

          圖2.MF RC530接收器電路框圖

          圖3.MF RC530定時器模塊框圖

          圖4.MF RC530帶共同讀/寫選通的與微處理器的連接框圖

          圖5.MF RC530單獨讀/寫選通的與微處理器的連接框圖

          圖6.MF RC530帶直接匹配天線的應用電路圖


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