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          EEPW首頁 > 嵌入式系統(tǒng) > 設(shè)計應(yīng)用 > Atmel AT86RF233單片2.4GHz無線收發(fā)解決方案

          Atmel AT86RF233單片2.4GHz無線收發(fā)解決方案

          作者: 時間:2012-10-22 來源:網(wǎng)絡(luò) 收藏

          公司的是富有特性極低功耗的器,接收器靈敏度-101dBm,可編程輸出功率從-17dBm到+40dBm,工作電壓1.8V-3.6V,深度睡眠的功耗為0.02uA,主要用于 IEEE 802.15.4和ZigBee系統(tǒng),RF4CE系統(tǒng),能量收獲系統(tǒng),6LoWPAN系統(tǒng),工業(yè)控制,住宅區(qū)和商業(yè)自動化,醫(yī)療保健,消費類電子和PC外設(shè)等.本文介紹了主要特性,方框圖,基本和擴展特性應(yīng)用電路,以及評估板REB233SMAD主要特性,框圖,電路圖,材料清單和PCB元件布局圖.

          本文引用地址:http://www.ex-cimer.com/article/148317.htm

          The is a feature rich, extremely low-power radio transceiver designed for industrial and consumer ZigBee/IEEE 802.15.4, RF4CE, 6LoWPAN, and high data rate 2.4GHz ISM band applications. The radio transceiver is a true SPI-to-antenna solution. All RF-critical components except the antenna, crystal and de-coupling capacitors are integrated on-chip. MAC and AES hardware accelerators improve overall system power efficiency and timing. Therefore, the AT86RF233 is particularly suitable for applications like:

          2.4GHz IEEE 802.15.4 and ZigBee systems

          RF4CE systems

          Energy Harvesting systems

          6LoWPAN systems

          Wireless sensor networks

          Industrial Control

          Residential and commercial automation

          Health care

          Consumer electronics

          PC peripherals

          The AT86RF233 single-chip radio transceiver provides a complete radio transceiver interface between an antenna and a microcontroller. It comprises the analog radio, digital modulation and demodulation including time and frequency synchronization and data buffering. The number of external components is minimized such that only the antenna, the crystal and decoupling capacitors are required. The bidirectional differential antenna pins (RFP, RFN) are used for transmission and reception, thus no external antenna switch is needed.

          The received RF signal at pin 5 (RFN) and pin 6 (RFP) is differentially fed through the low-noise amplifier (LNA) to the RF filter (PPF) to generate a complex signal, driving the integrated channel filter (BPF). The limiting amplifier provides sufficient gain to drive the succeeding analog-to-digital converter (ADC) and generates a digital RSSI signal. The ADC output signal is sampled by the digital base band receiver (RX BBP).

          The transmit modulation scheme is offset-QPSK (O-QPSK) with half-sine pulse shaping and 32-length block coding (spreading) according to [2] and [1]. The modulation signal is generated in the digital transmitter (TX BBP) and applied to the fractional-N frequency synthesis (PLL), to ensure the coherent phase modulation required for demodulation of O-QPSK signals. The frequency-modulated signal is fed to the power amplifier (PA).

          A differential pin pair DIG3/DIG4 can be enabled to control an external RF front-end. Two on-chip low-dropout voltage regulators (A|DVREG) provide the analog and digital 1.8V supply.

          An internal 128-byte RAM for RX and TX (Frame Buffer) buffers the data to be transmitted or the received data.

          The configuration of the Atmel AT86RF233, reading and writing of Frame Buffer is controlled by the SPI interface and additional control lines.

          The AT86RF233 further contains comprehensive hardware-MAC support (Extended Operating Mode) and a security engine (AES) to improve the overall system power efficiency and timing. The stand-alone 128-bit AES engine can be accessed in parallel to all PHY operational transactions and states using the SPI interface, except during SLEEP and DEEP_SLEEP states.

          For applications not necessarily targeting IEEE 802.15.4 compliant networks, the radio transceiver also supports alternative data rates up to 2000kb/s.

          For long-range applications or to improve the reliability of an RF connection the RF performance can further be improved by using an external RF front-end or Antenna Diversity. Both operation modes are supported by the AT86RF233 with dedicated control pins without the interaction of the microcontroller.

          AT86RF233主要特性:

          • High Performance RF-CMOS 2.4GHz radio transceiver targeted for IEEE® 802.15.4, ZigBee®, RF4CE,6LoWPAN, and ISM applications

          • Industry leading link budget:

          - Receiver sensitivity -101dBm

          - Programmable output power from -17dBm up to +4dBm

          • Ultra-low current consumption:

          - DEEP_SLEEP = 0.02μA

          - TRX_OFF = 300μA

          - RX_ON = 11.8mA (LISTEN w/o Smart Receiving)

          - RX_ON = 6.0mA (LISTEN w/ Smart Receiving)

          - BUSY_TX = 13.8mA (at max. transmit power)

          • Ultra-low supply voltage (1.8V to 3.6V) with internal regulator

          • Support for coin cell operation

          • Optimized for low BoM Cost and ease of production:

          - Few external components necessary (crystal, capacitors and antenna)

          • Easy to use interface:

          - Registers, frame buffer and AES accessible through fast SPI


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