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          EEPW首頁 > 電源與新能源 > 設計應用 > Fairchild FAN6300A 90W電源適配器設計方案

          Fairchild FAN6300A 90W電源適配器設計方案

          作者: 時間:2011-05-17 來源:網絡 收藏

          公司的/H是高度集成的準諧振PWM控制器,適用于反激轉換器, 工作頻率可低于100kHz, FAN6300H工作頻率可高達190kHz,具有高壓起動和峰值電流模式控制,以及逐個周期的限流,主要用于AC/DC 筆記本電腦和開架開關(SMPS).本文介紹了/H 主要特性, 功能方框圖, 典型應用電路框圖以及(19V/4.74A)參考完整電路圖和材料清單(BOM).

          The highly integrated FAN6300A/H of PWM controller provides several features to enhance the performance of flyback converters. FAN6300A is applied on quasiresonant flyback converters where maximum operating frequency is below 100kHz. FAN6300H is suitable for high-frequency operation (up to 190kHz). A built-in HV startup circuit can provide more startup current to reduce the startup time of the controller. Once the VDD voltage exceeds the turn-on threshold voltage, the HV startup function is disabled immediately to reduce power consumption. An internal valley voltage detector ensures power system operates at quasi-resonant operation over a wide-range of line voltage and any load conditions, as well as reducing switching loss to minimize switching voltage on drain of power MOSFET.

          To minimize standby power consumption and light-load efficiency, a proprietary green-mode function provides off-time modulation to decrease switching frequency and perform extended valley voltage switching to keep to a minimum switching voltage. The operating frequency is limited by minimum toff time, which is 38μs to 8μs in FAN6300A and 13μs to 3μs in FAN6300H, so FAN6300H can operate at higher switching frequency than FAN6300A.

          FAN6300A/H controller also provides many protection functions. Pulse-by-pulse current limiting ensures the fixed-peak current limit level, even when a short circuit occurs. Once an open-circuit failure occurs in the feedback loop, the internal protection circuit disables PWM output immediately. As long as VDD drops below the turn-off threshold voltage, the controller also disables PWM output. The gate output is clamped at 18V to protect the power MOS from high gate-source voltage conditions. The minimum tOFF time limit prevents the system frequency from being too high. If the DET pin triggers OVP, internal OTP is triggered and the power system enters latch-mode until AC power is removed.

          The FAN6300A/H controller is available in the 8-pin Small Outline Package (SOP) and the Dual Inline Package (DIP).

          FAN6300A/H 主要特性:

          High-Voltage Startup

          Quasi-Resonant Operation

          Cycle-by-Cycle Current Limiting

          Peak-Current-Mode Control

          Leading-Edge Blanking (LEB)

          Internal Minimum tOFF

          Internal 5ms Soft-Start

          Over Power Compensation

          GATE Output Maximum Voltage

          Auto-Recovery Over-Current Protection(FB Pin)

          Auto-Recovery Open-Loop Protection(FB Pin)

          VDD Pin and Output Voltage (DET Pin) OVP Latched

          Low Frequency Operation (below 100kHz) for FAN6300A

          High Frequency Operation (up to 190kHz) for FAN6300H

          FAN6300A/H應用:

          AC/DC NB Adapters

          Open-Frame SMPS

          圖1.FAN6300A/H功能方框圖

          圖2.FAN6300A/H典型應用電路框圖


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