設(shè)計基于LED的視頻顯示板,Designing an LED
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Table 3 represents a partial control video frame of 320 pixel columns and 96 pixel rows. LVDS channels 1 through 5 deliver video and control information for pixel columns 0 through 63, 64 through 127, 128 through 191, 192 through 255, and 256 through 319 respectively. In a control video frame, each pixel in rows 0 and 1 contains the 24 header (HDR) bits of the configuration. Rows 32 and 33 host the header bits of the global intensity PDM, and rows 64 and 65 contain the header bits of the CALDAC. The 30 rows that follow each group of 2 header rows correspond to 30 rows of LED display module PCBs of this reference design. The 64 pixels of each row within a particular LVDS column have the information for 64 MAX6974 LED drivers on each LED display module PCB. Each pixel contains the 24-bit control information for one MAX6974 device. Rows beyond 95 are not used in a control video frame.
GUI for Display Board Control
A GUI (Figure 4) is used to set up the configuration, global intensity PDM, and CALDAC register bits for all MAX6974 devices utilized in this design. On the GUI, there is a global setting option for adjusting corresponding parameters for all chips on a video-display board. There are also device tabs where parameters for each chip can be adjusted individually. Settings for all registers and all MAX6974 LED drivers can be saved to a file and loaded once the video-display board is turned on. There is an initial settings file with typical register parameters to simplify the video-display board product-initialization process.
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Figure 4. MAX6974 video-display board GUI.
The GUI appears in the Windows operating system as an individual application window. It creates a video control frame and sends it to the video-display board once the Write button on the GUI is activated. The video control frame only needs to appear once in a video refresh rate of 60Hz. The video control frame could occupy the entire screen of the of the video-display board; however, the FPGA detects the control frame header rows and sends corresponding information to MAX6974's registers directly. Therefore, the contents of video control frame will not appear on the video-display board. Although this skips a video-frame update, it is not noticeable to the human eye.
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