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          EEPW首頁 > EDA/PCB > 設(shè)計應(yīng)用 > 一種可編程的全數(shù)字鎖相環(huán)路的實現(xiàn)

          一種可編程的全數(shù)字鎖相環(huán)路的實現(xiàn)

          作者: 時間:2009-12-15 來源:網(wǎng)絡(luò) 收藏

          1.2 DPLL電路實現(xiàn)

          1.2.1 數(shù)字鑒相器

          數(shù)字鑒相器由異或門構(gòu)成,并使用VHDL語言編程來實現(xiàn)。異或鑒相器比較輸入信號IN64和輸出信號OUT64之間的相位差,輸出誤差信號ud作為可逆計數(shù)器Q的計數(shù)方向信號。環(huán)路鎖定時,ud為一個占空比為50%的方波,此時的絕對相位差為90°,因此異或鑒相器相位差極限為±90°。


          1.2.2 數(shù)字環(huán)路濾波器
          數(shù)字環(huán)路濾波器由變??赡嬗嫈?shù)器Q構(gòu)成。在ud的控制下,當(dāng)j=0時,Q對時鐘Mf0進(jìn)行“加”計數(shù);當(dāng)j=1時,Q對時鐘Mf0進(jìn)行“減”計數(shù)??赡嬗嫈?shù)器的模數(shù)K可以通過Ka、Kb、Kc、Kd四個輸入端進(jìn)行預(yù)置,當(dāng)Ka、Kb、Kc、Kd在0001~1110取值時,相應(yīng)模數(shù)的變化范圍是 2 3~2 16。數(shù)字環(huán)路濾波器用VHDL語言編程實現(xiàn),其程序如下:
          library ieee;
          use ieee.std_logic_1164.a(chǎn)ll;
          use ieee.std_logic_unsigned.a(chǎn)ll;
          entity count_zj is
          port(clkl,j,Kd,Kc,Kb,Ka,en:in std_logic;
          INC,DEC:out std_logic);
          End count_zj;
          architecture behave Of eonnt_zj is
          signal cq,k,mo,k2,mo2,cql:std_logic_vector(16 downto 0);
          signal caol,cao2,caoll,cao22,caolll,cao222:std_logic;
          signal instruction,aa,q1,q2:std_lOgic_vector(3 downto 0);
          begin
          instruction=Kd Kc Kb Ka;
          aa=instruction+1;
          with instruction select
          mo=“00000000000000111”when“0001”,
          “0000000000000t111”when“0010”,
          “000(0)0(000~11111”when“0011”,
          “00000000000111111”when“0100”,
          “00000000001111111”when“0101”,
          “00000000011111111”when“0110”,
          “00000000111111111”when“0111”,
          “00000001111111111”when“1000”,
          “00000011111111111”when“1001”,
          “00000111111111111”when“1010”,
          “00001111111111111”when“1011”,
          “00011111111111111”when“1100”,
          “00111111111111111”when“1101”,
          “01111111111111111”when“1110”,
          “11111111111111111”when“1111”,
          “00000000000000111”when others;
          with aa select
          m02=“00000000000000111”when“0001”,
          “00000000000001111”when“0010”,
          “00000000000011111”when“0011”,
          “00000000000111111”when“0100”,
          “00000000001111111”when“0101”,
          “00000000011111111”when“0110”,
          “00000000111111111”when“0111”,
          “00000001111111111”when“1000”,
          “00000011111111111”when“1001”,
          “00000111111111111”when“1010”,
          “00001111111111111”when“1011”,
          “00011111111111111”when“1100”,
          “00111111111111111”when“1101”,
          “01111111111111111”when“1110”,
          “11111111111111111”when“1111”,
          “00000000000000111”when othels;
          process(clkl,j,mo,en)

          數(shù)字通信相關(guān)文章:數(shù)字通信原理


          塵埃粒子計數(shù)器相關(guān)文章:塵埃粒子計數(shù)器原理
          鑒相器相關(guān)文章:鑒相器原理
          數(shù)字濾波器相關(guān)文章:數(shù)字濾波器原理
          鎖相環(huán)相關(guān)文章:鎖相環(huán)原理
          鎖相放大器相關(guān)文章:鎖相放大器原理
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